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An efficient VLSI architecture for real-time additive synthesis of musical signals

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5 Author(s)

This paper presents a new architecture for the hardware implementation of additive synthesis for high-quality musical sound generation. A marginally stable second-order infinite-impulse-response filter is used to generate each sinusoid, the frequency, amplitude, and phase of which can independently be specified. A chip has been designed with a bit-level systolic array approach. It is capable of performing 1200 sinusoid real-time synthesis. Furthermore, it is possible to connect up to 11 chips, to achieve an outstanding 13 200 sinusoid synthesis. Two completely independent output channels are available as 20-b streams. The system is clocked at 60 MHz when working with a 44.1-kHz sampling rate. The integrated circuit is designed in a 0.5-/spl mu/m CMOS technology and has a core area of approximately 19 mm/sup 2/.

Published in:

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on  (Volume:7 ,  Issue: 1 )

Date of Publication:

March 1999

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