Referenced Items are not available for this document.
A new multistage operational amplifier topology requires only N-2 embedded compensation networks for N gain stages. The compensation circuits do not load the output stage, and noninverting gain stages are not required as in previous multistage approaches. Consequently, high gain, wide bandwidth, fast slewing, and excellent power efficiency are achieved. A low-power resistance-capacitance compensation technique assures stability and fast settling over process, voltage, and temperature variations. Implemented in a 0.6-μm n-well CMOS process, a single ended three-stage prototype dissipates 6.9 mW at 3.0 V with 102 dB gain, 47 MHz bandwidth, and 69 V/μs average slew rate with 40 pF load
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:34
,
Issue:
3
)
Date of Publication: Mar 1999
- Page(s):
- 339 - 347
- ISSN :
- 0018-9200
- INSPEC Accession Number:
- 6184853
- Digital Object Identifier :
- 10.1109/4.748185
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Mar 1999
- Sponsored by :
- IEEE Solid-State Circuits Society
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