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A multistage amplifier technique with embedded frequency compensation

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3 Author(s)
Hiok-Tiaq Ng ; Dept. of Electr. Eng., Arizona State Univ., Tempe, AZ, USA ; Ziazadeh, R.M. ; Allstot, D.J.

A new multistage operational amplifier topology requires only N-2 embedded compensation networks for N gain stages. The compensation circuits do not load the output stage, and noninverting gain stages are not required as in previous multistage approaches. Consequently, high gain, wide bandwidth, fast slewing, and excellent power efficiency are achieved. A low-power resistance-capacitance compensation technique assures stability and fast settling over process, voltage, and temperature variations. Implemented in a 0.6-μm n-well CMOS process, a single ended three-stage prototype dissipates 6.9 mW at 3.0 V with 102 dB gain, 47 MHz bandwidth, and 69 V/μs average slew rate with 40 pF load

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:34 ,  Issue: 3 )