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Recent advances in memory consistency models for hardware shared memory systems

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3 Author(s)
Adve, S.V. ; Dept. of Electr. & Comput. Eng., Rice Univ., Houston, TX, USA ; Pai, V.S. ; Ranganathan, P.

The memory consistency model of a shared memory system determines the order in which memory operations will appear to execute to the programmer. The memory consistency model for a system typically involves a tradeoff between performance and programmability. The paper provides an overview of recent advances in hardware optimizations; compiler optimizations, and programming environments relevant to memory consistency models of hardware distributed shared memory systems. We discuss recent hardware and compiler optimizations that exploit the observation that it is sufficient to only appear as if the ordering rules of the consistency model are obeyed. These optimizations substantially improve the performance of the strictest consistency model, making it more attractive for its programmability. Recent concurrent programming languages and environments, on the other hand, support more relaxed consistency models. We discuss several such environments, including POSIX threads, Java, and OpenMP

Published in:

Proceedings of the IEEE  (Volume:87 ,  Issue: 3 )

Date of Publication:

Mar 1999

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