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Cache-coherent distributed shared memory: perspectives on its development and future challenges

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3 Author(s)
Hennessy, J. ; Comput. Syst. Lab., Stanford Univ., CA, USA ; Heinrich, M. ; Gupta, A.

Distributed shared memory is an architectural approach that allows multiprocessors to support a single shared address space that is implemented with physically distributed memories. Hardware-supported distributed shared memory is becoming the dominant approach for building multiprocessors with moderate to large numbers of processors. Cache coherence allows such architectures to use caching to take advantage of locality in applications without changing the programmer's model of memory. We review the key developments that led to the creation of cache-coherent distributed shared memory and describe the Stanford DASH multiprocessor, the first working implementation of hardware-supported scalable cache coherence. We then provide a perspective on such architectures and discuss important remaining technical challenges

Published in:

Proceedings of the IEEE  (Volume:87 ,  Issue: 3 )