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An effective memory addressing scheme for FFT processors

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1 Author(s)
Yutai Ma ; Dept. of Electr. Eng., Linkoping Univ., Sweden

The memory organization of FFT processors is considered. The new memory addressing assignment allows simultaneous access to all the data needed for butterfly calculations. The advantage of this memory addressing scheme lies in the fact that it reduces the delay of address generation nearly by half compared to existing ones

Published in:

Signal Processing, IEEE Transactions on  (Volume:47 ,  Issue: 3 )