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Improved stability of polysilicon thin-film transistors under self-heating and high endurance EEPROM cells for systems-on-panel

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4 Author(s)
Jin-Woo Lee ; Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Taejon, South Korea ; Nae-In Lee ; Hoon-Ju Chung ; Chul-Hi Han

The stability of poly-Si TFTs on quartz with thin (12 nm) ECR N/sub 2/O-plasma gate oxide and high endurance poly-Si TFT EEPROMs are presented. The fabricated n-channel (p-channel) TFTs on quartz have mobilities of 262 (102) cm/sup 2//V/spl middot/s and subthreshold slopes of 72 (86) mV/dec. Although the TFTs on quartz exhibit self-heating effects, /spl Delta/V/sub T/ after stress is less than 0.2 V, which is remarkably excellent. The fabricated planar CMOS poly-Si TFT EEPROMs have excellent endurance characteristics of 10/sup 5/ program/erase cycles, which is attributed to the highly reliable ECR N/sub 2/O-plasma tunnel oxide. The degradation of stage delay of a ring-oscillator is also very small after stress.

Published in:

Electron Devices Meeting, 1998. IEDM '98. Technical Digest., International

Date of Conference:

6-9 Dec. 1998