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A low cost approach for detecting, locating, and avoiding interconnect faults in FPGA-based reconfigurable systems

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2 Author(s)
D. Das ; Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA ; N. A. Touba

An FPGA-based reconfigurable system may contain boards of FPGAs which are reconfigured for different applications and must work correctly. This paper presents a novel approach for rapidly testing the interconnect in the FPGAs each time the system is reconfigured. A low-cost configuration-dependent test method is used to both detect and locate faults in the interconnect. The “original configuration” is modified by only changing the logic function of the CLBs to form “test configurations” that can be used to quickly test the interconnect using the “walking-1” approach. The test procedure is rapid enough to be performed on the fly whenever the system is reconfigured. All stuck-at faults and bridging faults in the interconnect are guaranteed to be detected and located with a short test length. The fault location information can he used to reconfigure the system to avoid the faulty hardware

Published in:

VLSI Design, 1999. Proceedings. Twelfth International Conference On

Date of Conference:

7-10 Jan 1999