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Simulation of complete VLSI fabrication processes with heterogeneous simulation tools

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4 Author(s)
C. M. Pichler ; Nat. Semicond. Corp., Santa Clara, CA, USA ; R. Plasun ; R. Strasser ; S. Selberherr

An integrated environment for the simulation of VLSI fabrication processes is presented. Emphasis is put on automated operation to achieve maximum efficiency in TCAD deployment. Addressing the increasing number and diversity of process steps in state-of-the-art semiconductor fabrication processes, mechanisms have been devised to support the smooth, automatic interaction of heterogeneous simulation tools with multiple data formats in the context of large-scale experiments for global calibration, device optimization, and yield improvement tasks. For maximum versatility, the operation of the environment is either controlled via a graphical user interface, a batch file, or a combination of the two. It is possible to submit predefined analysis tasks for background execution, while still being able to monitor and control operation and to access and view simulation data interactively. Split-lot experiments are performed on workstation clusters in parallel operation, delivering the desired results in the shortest possible time. The TCAD environment presented offers server functionality for running large number of complex simulations. At the same time, it supports the design and seamless integration into the environment of client task applications

Published in:

IEEE Transactions on Semiconductor Manufacturing  (Volume:12 ,  Issue: 1 )