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Simplification of two-level logic circuit function by three-branch-tree-expansion and binary decision diagrams

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4 Author(s)
Goto, K. ; Kanagawa Inst. of Technol., Japan ; Ito, T. ; Chin, K.S. ; Ling, X.P.

This paper describes the generation of a minimal covering of prime implicants for either the single-output function or the multiple-output function having `don't cares' by using Three-Branch-Tree-Expansion (TBTE) method with the support of Binary Decision Diagrams (BDDs). This algorithm was realized in C language program and compared with ESPRESSO-II in terms of both the computation time and the number of prime implicants by using a SUN SPARC station 5. Our method recorded much shorter computation time than ESPRESSO-II, especially for the single-output function

Published in:

Circuits and Systems, 1998. IEEE APCCAS 1998. The 1998 IEEE Asia-Pacific Conference on

Date of Conference:

24-27 Nov 1998