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SymFony: a hybrid topological-symbolic ATPG exploiting RT-level information

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6 Author(s)
Corno, F. ; Dipt. di Autom. e Inf., Politecnico di Torino, Italy ; Glaser, U. ; Prinetto, P. ; Reorda, M.S.
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Combining different techniques for sequential automated test pattern generation (ATPG) can help overcome their respective limits and exploit their advantages. In this paper, a hybrid technique resulting from mixing topologic and symbolic approaches to the sequential ATPG problem is presented. Macros are first identified within the circuit (possibly resorting to RT-level knowledge of circuit architecture). Information about macro behavior is then computed and efficiently stored resorting to symbolic techniques. A topological tool exploits this information during the ATPG process to speed-up the propagation task and to identify early unsuccessful choices. Experimental results are reported, demonstrating that the method is able to improve the efficiency of a topological ATPG in terms of required CPU time and attained fault coverage, especially on medium-sized control-dominated circuits

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:18 ,  Issue: 2 )