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Design for soft-error robustness to rescue deep submicron scaling

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1 Author(s)

Error detecting and correcting code based memory design, self-checking design, VLSI-level retry architectures, perturbation hardened design, tools for evaluation of soft error rates, and other on-line testing techniques are becoming mandatory in order to achieve increasingly levels of soft-error robustness and push aggressively the limits of technological scaling. In the next few years, considerable efforts have to be concentrated on the development of such techniques and the related CAD tools

Published in:

Test Conference, 1998. Proceedings., International

Date of Conference:

18-23 Oct 1998

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