By Topic

Half-micron CMOS on ultra-thin silicon on insulator

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

6 Author(s)
Woerlee, P.H. ; Philips Res. Lab., Eindhoven, Netherlands ; van Ommen, A.H. ; Lifka, H. ; Juffermans, C.A.H.
more authors

A 0.5- mu m CMOS technology on ultrathin SIMOX SOI (silicon-on-insulator) material with silicon film thickness of 80 nm is studied. When compared with bulk devices the SOI NMOS devices showed a slightly reduced current-drive-capability, a small negative differential output conductance at high gate bias, and a strongly reduced breakdown voltage. Floating-substrate effects remain significant even for SOI devices on ultrathin material. The hot-carrier degradation of the SOI NMOS devices was significantly enhanced by electron injection in the buried oxide layer. The performance of ring oscillators on SOI material was excellent. Furthermore, fully functional 2K SRAM circuits were fabricated. The main advantages of ultrathin-film SOI seem to be the improved circuit properties and the simplified fabrication technology. The reduction of the floating-body effects in the devices on ultrathin-film SOI is required to make SOI a competitor to bulk material for future deep submicron CMOS.<>

Published in:

Electron Devices Meeting, 1989. IEDM '89. Technical Digest., International

Date of Conference:

3-6 Dec. 1989