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An integrated 0.5 mu m CMOS disposable TiN LDD/salicide spacer technology

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7 Author(s)
Pfiester, J.R. ; Motorola Inc., Austin, TX, USA ; Parrillo, L.C. ; Woo, M. ; Kawasaki, H.
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A novel disposable TiN LDD/salicide spacer process has been developed for a 0.5- mu m CMOS technology. Both LDD (lightly doped drain) and salicide definition are obtained using a single disposable TiN spacer. This process results in CMOS devices with low salicided junction leakage, reduced source/drain lateral diffusion, and shallow phosphorus n- and boron p-regions for improved short-channel behavior.<>

Published in:

Electron Devices Meeting, 1989. IEDM '89. Technical Digest., International

Date of Conference:

3-6 Dec. 1989