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A self-aligned inverse-T gate fully overlapped LDD device for sub-half micron CMOS

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6 Author(s)
Wen, D.S. ; IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA ; Hsu, C.C.-H. ; Taur, Y. ; Zicherman, D.S.
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A novel self-aligned technique for fabricating inverse-T gate fully overlapped LDD (FOLD) MOSFETs is proposed. The technique uses an oxide or TiN buffer layer sandwiched in a polysilicon gate stack to act as an RIE (reactive ion etching) etch stop. Both the oxide and TiN exhibit good etch selectivities with respect to polysilicon. Therefore, a controllable, uniform polysilicon finger can be obtained to form the inverse-T structure. A 0.35- mu m n-channel inverse-T gate MOSFET with fully overlapped LDD (lightly doped drain) design has been fabricated and characterized. It is found that the inverse-T LDD device preserves the performance of a non-LDD device while providing reliability improvement similar to that of a conventional LDD device. The inverse-T LDD device is suitable for high-performance, high-reliability sub-half-micron device applications.<>

Published in:

Electron Devices Meeting, 1989. IEDM '89. Technical Digest., International

Date of Conference:

3-6 Dec. 1989