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Partitioning and reordering techniques for static test sequence compaction of sequential circuits

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2 Author(s)
M. S. Hsiao ; Dept. of Electr. & Comput. Eng., Rutgers Univ., Piscataway, NJ, USA ; S. T. Chakradhar

We propose a new static test set compaction method based on a careful examination of attributes of fault coverage curves. Our method is based on two key ideas: (1) fault-list and test-set partitioning, and (2) vector re-ordering. Typically, the first few vectors of a test set detect a large number of faults. The remaining vectors usually constitute a large fraction of the test set, but these vectors ore included to detect relatively few hard faults. We show that significant compaction can be achieved by partitioning faults into hard and easy faults. This significantly reduces the computational cost for static test set compaction without affecting quality of compaction. The second technique re-orders vectors in a test yet by moving sequences that detect hard faults to the beginning of the test set. Fault simulation of the newly concatenated re-ordered test set results in the omission of several vectors so that the compact test set is smaller than the original test set. Experiments on several ISCAS 89 sequential benchmark circuits and large production circuits show that our compaction procedure yields significant test set reductions in low execution times

Published in:

Test Symposium, 1998. ATS '98. Proceedings. Seventh Asian

Date of Conference:

2-4 Dec 1998