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A new algorithm for elimination of common subexpressions

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5 Author(s)
Pasko, R. ; Fac. of Electr. Eng., Slovak Tech. Univ., Bratislava, Slovakia ; Schaumont, P. ; Derudder, V. ; Vernalde, S.
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The problem of an efficient hardware implementation of multiplications with one or more constants is encountered in many different digital signal-processing areas, such as image processing or digital filter optimization. In a more general form, this is a problem of common subexpression elimination, and as such it also occurs in compiler optimization and many high-level synthesis tasks. An efficient solution of this problem can yield significant improvements in important design parameters like implementation area or power consumption. In this paper, a new solution of the multiple constant multiplication problem based on the common subexpression elimination technique is presented. The performance of our method is demonstrated primarily on a finite-duration impulse response filter design. The idea is to implement a set of constant multiplications as a set of add-shift operations and to optimize these with respect to the common subexpressions afterwards. We show that the number of add/subtract operations can be reduced significantly this way. The applicability of the presented algorithm to the different high-level synthesis tasks is also indicated. Benchmarks demonstrating the algorithm's efficiency are included as well

Published in:

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:18 ,  Issue: 1 )

Date of Publication:

Jan 1999

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