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Simulation of transmission line fault locators in a personal computer

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2 Author(s)
B. Jeyasurya ; Dept. of Electr. Eng., Indian Inst. of Technol., Bombay, India ; M. A. Rahman

The application of personal computers as a design tool for microprocessor-based transmission line fault locators is presented. Five fault-locating algorithms are simulated, and their performances are analyzed. Simulation results using a 400 kV transmission line model are presented. Simulation studies based on the data obtained from a laboratory model of a 400 kV, 510 km transmission line are also discussed. It is noted that the methods outlined are useful for relay design engineers for testing various fault locator designs and analyzing their performances

Published in:

IEEE Transactions on Industry Applications  (Volume:27 ,  Issue: 2 )