Referenced Items are not available for this document.
This paper presents a monolithic CMOS implementation of an envelope elimination and restoration linearization system that improves the linearity of efficient radio-frequency power amplifiers. The linearization IC, which occupies 4.3 mm2 when implemented in a 0.8-μm CMOS technology, consists of a limiter, envelope detectors, and delta-modulated switching power supply. This circuit was used to linearize advanced mobile phone system cellular power amplifiers transmitting North American digital cellular (NADC) waveforms. Measurements show that the linearized outputs meet the spectral mask and phase distortion requirements of NADC. The linearization system can improve the overall efficiency from 36 to 49%, while increasing the maximum linear output power from 26.5 to 29.5 dBm
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:33
,
Issue:
12
)
Date of Publication: Dec 1998
- Page(s):
- 2252 - 2258
- ISSN :
- 0018-9200
- INSPEC Accession Number:
- 6122991
- Digital Object Identifier :
- 10.1109/4.735710
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Dec 1998
- Sponsored by :
- IEEE Solid-State Circuits Society
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