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Planning wafer allocation for CMOS process development. A nonparametric approach

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6 Author(s)
Rao, S. ; Silicon Technol. Dev., Texas Instrum. Inc., Dallas, TX, USA ; Vasanth, K. ; Mozumder, P.K. ; Saxena, S.
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In this paper, we present techniques that can be used to answer the following two questions: (1) how many wafers need to be allocated per treatment to detect a given difference in a device performance metric and (2) how can one determine if a given treatment significantly improved a performance metric? The approach presented here does not make any assumptions regarding the shape of the distribution or the spatial dependency structure for the within-wafer performance measurements and remains applicable for a variety of performance metrics, such as mean, variance, and median. The analysis method can be used in decisions regarding the appropriateness of allocating half or quarter wafer splits to a treatment. Furthermore, the approach allows us to evaluate and compare within-wafer sampling strategies for comparing performance metrics from competing flows

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Semiconductor Manufacturing, IEEE Transactions on  (Volume:11 ,  Issue: 4 )