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Parallel ultra large scale engine SIMD architecture for real-time digital signal processing applications

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3 Author(s)
Marriott, P. ; MicroTech Microsyst. Inc., St. Laurent, Que., Canada ; Kraljic, I.C. ; Savaria, Y.

The instruction set and architecture of a SIMD processor optimized for real-time digital signal processing applications is presented. A novel structure allows computation and data I/O to be performed in parallel, provides interprocessor communications and enables the cascade of multiple chips without glue-logic to provide systems with large numbers of processors. Powerful processing elements and instruction set architecture allow complex real-time linear and non-linear algorithms to be coded. Dynamically reconfigurable systems can be also be built. A demonstrator chip was manufactured by ChipExpress. Benchmark comparisons and the methodology used to implement image processing applications on the PULSE, are also presented

Published in:

Computer Design: VLSI in Computers and Processors, 1998. ICCD '98. Proceedings. International Conference on

Date of Conference:

5-7 Oct 1998