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A new cobalt salicide technology for 0.15-μm CMOS devices

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5 Author(s)
Inoue, K. ; ULSI Device Dev. Lab., NEC Corp., Kanagawa, Japan ; Mikagi, Kaoru ; Abiko, H. ; Chikaki, S.
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A new cobalt (Co) salicide technology for sub-quarter micron CMOS transistors has been developed using high-temperature sputtering and in situ vacuum annealing. Sheet resistance of 11 Ω/□ for both gate electrode and diffusion layer was obtained with 5-nm-thick Co film. No line width dependence of sheet resistance was observed down to 0.15-μm-wide gate electrode and 0.33-μm-wide diffusion layer. The high temperature sputtering process led to the growth of epitaxial CoSi 2 layers with high thermal stability. By using this technology 0.15 μm CMOS devices which have shallow junctions were successfully fabricated

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Electron Devices, IEEE Transactions on  (Volume:45 ,  Issue: 11 )