SI issues associated with high speed packages

Signal integrity and EMC issues are becoming increasingly important in the design of electronic systems. Next generation designs will have higher clock speeds and smaller die sizes. Electronic designers are finding that they need to accurately characterize SI and EMC effects during the design phase to avoid costly delays later. Signal integrity issues are typically studied using an extraction tool with a circuit simulator to analyze crosstalk, switching noise and line reflection. Higher frequency effects, such as package resonance and radiation are studied using full wave simulation tools. Analysis of a high pin count, high speed package is presented. A quasi-static SI simulation using accurate extraction tools and a full-wave simulation are discussed. The effect of die paddle on crosstalk, reflection, resonance and radiation for this package are taken into account.