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The memory structures of ATLAS I, a high-performance, 16×16 ATM switch supporting backpressure

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4 Author(s)
Pnevmatikatos, D. ; Inst. of Comput. Sci., Found. for Res. & Technol., Hellas, Greece ; Kornaros, G. ; Kalokerinos, G. ; Xanthaki, C.

We present the overall structure of ATLAS I, emphasizing the memory use and requirements. We categorize these requirements in functionality and bandwidth and present the solutions we used in the first implementation of ATLAS I in a 0.35 μ CMOS technology. This implementation can serve as a starting point in the design of future switches with functionality similar to ATLAS I

Published in:

ASIC Conference 1998. Proceedings. Eleventh Annual IEEE International

Date of Conference:

13-16 Sep 1998

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