Nonlinear modeling and design of bipolar transistors ultra-low phase-noise dielectric-resonator oscillators

This paper presents a design methodology for low phase-noise dielectric-resonator oscillators (DRO's) with applications examples at 4 GHz. Different oscillators topologies are investigated and, finally, three oscillators' configurations have been simulated, realized in discrete elements, and characterized. The best measured phase-noise magnitude is -133 dBc/Hz at 10-kHz offset frequency.