By Topic

A 1.5-V differential cross-coupled bootstrapped BiCMOS logic for low-voltage applications

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Yuh-Kuang Tseng ; Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan ; Chung-Yu Wu

Two new bipolar complementary metal-oxide-semiconductor (BiCMOS) differential logic circuits called differential cross-coupled bootstrapped BiCMOS (DC2B-BiCMOS) and differential cross-coupled BiCMOS (DC2-BiCMOS) logic are proposed and analyzed. In the proposed two new logic circuits, the novel cross-coupled BiCMOS buffer circuit structure is used to achieve high-speed operation under low supply voltage. Moreover, a new bootstrapping technique that uses only one bootstrapping capacitor is adopted in the proposed DC2B-BiCMOS logic to achieve fast near-full-swing operation at 1.5 V supply voltage for two differential outputs. HSPICE simulation results have shown that the new DC2B-BiCMOS at 1.5 V and the new DC2-BiCMOS logic at 2 V have better speed performance than that of CMOS and other BiCMOS differential logic gates. It has been verified by the measurement results on an experimental chip of three-input DC2B-BiCMOS XOR/XNOR gate chain fabricated by 0.8 μm BiCMOS technology that the speed of DC2-BiCMOS at 1.5 V is about 1.8 times of that of the CMOS logic at 1.5 V. Due to the excellent circuit performance in high-speed, low-voltage operation, the proposed DC2B-BiCMOS and DC2-BiCMOS logic circuits are feasible for low-voltage, high-speed applications

Published in:

IEEE Journal of Solid-State Circuits  (Volume:33 ,  Issue: 10 )