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Describes a scalable parallel architecture for real-time, large scale neural network simulations. Currently the SIMD architecture is largely adopted for implementing digital neurocomputers. However, it is not efficient for simulating large scale neural networks in real-time because of its limited scalability and flexibility. The authors investigate, as a solution, a wavefront array processing (WAP) architecture based on asynchronous communications. The authors compare both architectures in scalability, performance, and flexibility for simulating multi-layer perceptrons. The authors also briefly discuss implementing a high performance digital neurocomputer based on the WAP.
Neural Networks, 1993. IJCNN '93-Nagoya. Proceedings of 1993 International Joint Conference on (Volume:2 )
Date of Conference: 25-29 Oct. 1993