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A scalable VLSI architecture for multichannel blind deconvolution and source separation

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4 Author(s)
H. Pan ; Dept. of Electr. Eng., Utah Univ., Salt Lake City, UT, USA ; D. Xia ; S. C. Douglas ; K. F. Smith

In this paper, we describe a scalable VLSI architecture for a signal processing system that separates multiple independent source signals from a set of linear, convolved mixtures. The architecture employs a recently-proposed entropy-based algorithm and consists of a two dimensional array of interconnected chips, each of which implements a two-input, two-output signal separation system. With a maximum of 255 filter coefficients per input-output channel. Chip communication is realized via separate state machines within each chip to simplify the design and enable its scalability to larger tasks. An application of the architecture to speech separation is described

Published in:

Signal Processing Systems, 1998. SIPS 98. 1998 IEEE Workshop on

Date of Conference:

8-10 Oct 1998