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A new VLSI architecture for interleaved filtering of sampled signals

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3 Author(s)
Nie, X. ; Semicond. Group, Siemens AG, Munich, Germany ; Pitscheider, M. ; Mehrgardt, S.

A VLSI architecture is presented for the filtering and decimation of the YUV video signals where the color difference signals U and V are sampled at the half of the sampling rate of the luminance signal Y. The poly-phase decomposition is applied to systematically derive the filter architecture. In this architecture we interleave the three signals Y, U and V with different sampling rates in such a way that the decimation filters only have to be implemented once to produce all three decimated Y, U and V signals at the output. The filter structure is canonical with respect to the number of delays. The technique has been applied to the high-speed CMOS implementation of an analog-to-digital-conversion circuit for high-quality video applications

Published in:

Consumer Electronics, IEEE Transactions on  (Volume:44 ,  Issue: 3 )

Date of Publication:

Aug 1998

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