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Performance constraints generation for analog circuit layout

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1 Author(s)
Mahmoud, I.I. ; Dept of Eng., Atomic Energy Authority, Egypt

In this paper, a method for layout constraint generation of analog circuits is presented. The method comprises two phases: primitive recognition and constraint generation. A mixed analytical/knowledge-based technique is proposed. Complexity analysis shows the effectiveness of this method compared with simulation based methods

Published in:

Radio Science Conference, 1998. NRSC '98. Proceedings of the Fifteenth National

Date of Conference:

24-26 Feb 1998