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The S-LINK in the data sources for trigger demonstrators in the LHC environment

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5 Author(s)
Hajduk, Z. ; H. Niewodniczanski Inst. of Nucl. Phys., Kracow, Poland ; Iwariski, W. ; Korcyl, K. ; Olszowska, J.
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The hardware for the data sources to be used in the ATLAS trigger demonstrator programme has been designed and built. As a basic element, the SLATE2 module has been used. The S-LINK protocol, as a transfering data standard, has been chosen. A cheap implementation of the S-LINK, the “Parallel Electrical S-LINK”, has been built. Featuring all the specification laid down in the standard it uses a parallel twisted pair copper cable as a physical layer. A standard SCSI cable has been used. Both the Source and Destination Cards have the same PCB layout. The link may receive 32-bit wide data words at max 40 MHz input rate. Running with 40 MHz link clock, it outputs 32-bit data at a rate of 20 MHz, giving total a bandwidth of 80 MB/s. We report on main characteristics of this implementation. The SLATE2SLINK card has been built to interface the SLATE motherboard to the S-LINK environment. This daughter card is capable to house and independently control 3 S-LINK sites. Running with the 25 MHZ SLATE's clock and 32-bit data, it features total a bandwidth up to 300 MB/s

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Nuclear Science, IEEE Transactions on  (Volume:45 ,  Issue: 4 )