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Testability features of the AMD-K6 microprocessor

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3 Author(s)
Fetherson, R.S. ; Adv. Micro Devices Inc., Sunnyvale, CA, USA ; Shak, I.P. ; Ma, S.C.

The AMD-K6's embedded design-for-testability structures and test pattern development methodologies provide high-quality manufacturing tests. The DFT features support static voltage-level testing for wafer-sort and debug testing, application of two pattern sequences for detection of timing-related failures, scan-based BIST, and 1149.1 boundary scan

Published in:

Design & Test of Computers, IEEE  (Volume:15 ,  Issue: 3 )

Date of Publication:

Jul-Sep 1998

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