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An improved analytical yield evaluation method for redundant RAM's

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2 Author(s)
Battaglini, G. ; Dept. of Syst. & Comput. Eng., Rome Univ., Italy ; Ciciani, B.

A new stochastic method is introduced for calculating the manufacturing field of fault-tolerant VLSI/WSI systems. This method is an improvement on a previous method based on a Markov chain. This new method gives a higher lower bound value of the field with respect to other methods based on the same assumptions. This improvement is obtained by the consideration of reconfiguration strategies based on the knowledge of the fault patterns and the redundancy levels. The proposed method is easy to use in parametric studies of the field of a chip versus redundancy level and very versatile for inclusion in CAM/CAD programming environments

Published in:

Memory Technology, Design and Testing, 1998. Proceedings. International Workshop on

Date of Conference:

24-25 Aug 1998