By Topic

An improved analytical yield evaluation method for redundant RAM's

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Battaglini, G. ; Dept. of Syst. & Comput. Eng., Rome Univ., Italy ; Ciciani, B.

A new stochastic method is introduced for calculating the manufacturing field of fault-tolerant VLSI/WSI systems. This method is an improvement on a previous method based on a Markov chain. This new method gives a higher lower bound value of the field with respect to other methods based on the same assumptions. This improvement is obtained by the consideration of reconfiguration strategies based on the knowledge of the fault patterns and the redundancy levels. The proposed method is easy to use in parametric studies of the field of a chip versus redundancy level and very versatile for inclusion in CAM/CAD programming environments

Published in:

Memory Technology, Design and Testing, 1998. Proceedings. International Workshop on

Date of Conference:

24-25 Aug 1998