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Modeling and emulation of a furnace in IC fab based on colored-timed Petri net

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2 Author(s)
Sheng-Ya Lin ; Dept. of Mech. Eng., Nat. Taiwan Univ., Taipei, Taiwan ; Han-Pang Huang

In integrated circuit (IC) manufacturing, the wafer processing takes more time in furnaces than other equipment. How to effectively integrate furnaces with other automated machines is very important. In particular, using the real furnace for testing not only introduces trouble but also wastes time. This paper aims to model and construct an emulation environment for the furnace. The colored timed Petri net (CTPN) is used to model the furnace. Based on CTPN, the dynamic behaviors of the furnace, such as loading, processing, unloading and wafer count mismatching, can be emulated. The proposed CTPN model is hierarchical and modular. The hierarchical architecture is built by dividing the behaviors of the furnace to make the model more compact and the modular modeling makes the model flexible and easy to use. On the other hand, the furnace emulator provides a quasi environment for testing so that potential problems of the system can be detected in advance and the testing time can be economized

Published in:

Semiconductor Manufacturing, IEEE Transactions on  (Volume:11 ,  Issue: 3 )

Date of Publication:

Aug 1998

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