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Measurement and modeling of high-speed interconnect-limited digital ring oscillators: The effect of dielectric anisotropy

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5 Author(s)
Garg, A. ; Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY, USA ; Le Coz, Y.L. ; Greub, H.J. ; McDonald, J.F.
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IC interconnect characterization is growing in importance as devices become faster and smaller. Accurate numerical extraction of 3D interconnect capacitance is essential for achieving design targets in the multi-GHz digital regime. An AlGaAs-GaAs heterojunction-bipolar-transistor test chip was fabricated. The chip used 3-level metal with anisotropic polyimide interlevel dielectrics. Full differential current-mode logic circuit technology was employed. The chip contained a variety of interconnect capacitor structures (parallel plate, finger, crossover) and interconnect-limited ring-oscillator circuits. Capacitance and oscillator frequency measurements were performed to compare with CAD-tool predictions. Good agreement with measurements was achieved with an independently obtained 25% uniaxial polyimide dielectric anisotropy. Measured and predicted results for the capacitor test structures generally agreed to within 2%. Predicted ring-oscillator periods were within 4% of measurement

Published in:

Interconnect Technology Conference, 1998. Proceedings of the IEEE 1998 International

Date of Conference:

1-3 Jun 1998