Referenced Items are not available for this document.
A novel salicide process is presented which allows for independent silicidation of source/drain areas and polysilicon gates, thus making it possible to achieve ultra-shallow junction formation with very low gate sheet resistance (Rs) for sub-0.25 μm CMOS device fabrication. Titanium was used to demonstrate this process in a 0.25 μm technology, yielding fully functional transistors with gate Rs<2 Ω/sq
Published in:
Interconnect Technology Conference, 1998. Proceedings of the IEEE 1998 International
Date of Conference: 1-3 Jun 1998
- Page(s):
- 93 - 95
- Meeting Date :
- 01 Jun 1998-03 Jun 1998
- Print ISBN:
- 0-7803-4285-2
- INSPEC Accession Number:
- 6134916
- Conference Location :
- San Francisco, CA
- Digital Object Identifier :
- 10.1109/IITC.1998.704760
- Product Type:
- Conference Publications
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