Stacked gate mid-channel injection flash EEPROM cell. I. Programming speed and efficiency versus device structure

Presents a new flash EEPROM cell which has been fabricated to achieve fast programming with low power. This memory cell attains speed and efficiency, comparable to the split-gate device, while preserving a simple stacked gate structure. The device programs faster than the stacked gate cell by a factor of about ten. Also, the threshold voltage shift of 5 V can be accomplished with the drain voltage of 3 V in about 50 /spl mu/s. The proposed memory cell is strongly resistant against the punchthrough effect and is capable of erasure in byte unit at the drain side. Factors pertinent to programming are discussed, theoretically and experimentally, in correlation with device structures. The hot electron dwell time in the channel is shown to be an important parameter, affecting the programming speed and efficiency.