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Improving the linearity in high-speed analog-to-digital converters

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3 Author(s)
Gatti, U. ; Res. & Dev. Center, Italtel Soc. Italiana Telecommun. SpA, Milan, Italy ; Gazzoli, G. ; Maloberti, F.

Future telecommunication systems will require A/D converters with resolution as high as 12 bit and very high linearity (>90 to dB) at more than 40 MHz sampling rate. These specifications make essential the use of digital calibration for attenuating the errors due to analog components inaccuracies. In this paper we propose a correction technique suitable for off-line and on-line operation. For the first approach we use statistical methods and digital look-up tables. For the second one we suggest a system where the input signal is doubly converted: at the required speed and at a reduced rate but with a higher precision. The slow representation updates the calibration digital look-up table while the data of the fast one are corrected by the look-up table itself. Simulations using Matlab on acquired data and extensive system studies indicated more than 15 dB of improvement in the converter linearity

Published in:

Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on  (Volume:1 )

Date of Conference:

31 May-3 Jun 1998