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A theoretical examination of the circuit requirements of power factor correction

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2 Author(s)
Tse, C.K. ; Dept. of Electron. Eng., Hong Kong Polytech. Univ., Hong Kong ; Chow, M.H.L.

In the first part of the paper, the requirements of circuits containing linear inductors, capacitors and ideal switches for the synthesis of power factor correction (PFC) converters are examined. Sufficient conditions for achieving PFC are stated in terms of the circuit topology and the switching sequence. Various topologies, from the simplest buck, boost, and buck-boost power converters to fourth-order Cuk, Zeta and SEPIC converters, are examined in the light of these topological conditions. In the second part of the paper, the general configuration of power supplies that provide PFC and voltage regulation are discussed. It consists of two simple power stages forming a three-port network which is terminated to an input voltage, a storage capacitor and an output load. The various possible arrangements of the two constituent power stages are discussed with emphasis on minimizing the amount of power that is processed serially by the power stages

Published in:

Power Electronics Specialists Conference, 1998. PESC 98 Record. 29th Annual IEEE  (Volume:2 )

Date of Conference:

17-22 May 1998