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A low-power integrated circuit for remote speech recognition

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4 Author(s)
Borgatti, M. ; Dipt. di Elettronica Inf. e Sistemistica, Bologna Univ., Italy ; Felici, M. ; Ferrari, A. ; Guerrieri, R.

In this paper, a low-power, low-voltage speech processing system is presented. The system is intended to he used in remote speech recognition applications where feature extraction is performed on terminal and high-complexity recognition tasks and moved to a remote server accessed through a radio link. The proposed system is based on a CMOS feature extraction chip for speech recognition that computes 15 cepstrum parameters, each 8 ms, and dissipates 30 μW at 0.9-V supply. Single-cell battery operation is achieved. Processing relies on a novel feature extraction algorithm using 1-bit A/D conversion of the input speech signal. The chip has been implemented as a gate array in a standard 0.5-μm, three-metal CMOS technology. The average energy required to process a single word of the TI46 speech corpus is 10 μJ. It achieves recognition rates over 98% in isolated-word speech recognition tasks

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:33 ,  Issue: 7 )