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Covering conditions and algorithms for the synthesis of speed-independent circuits

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3 Author(s)
Beerel, P.A. ; Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA ; Myers, C.J. ; Meng, T.H.

This paper presents theory and algorithms for the synthesis of standard C-implementations of speed-independent circuits. These implementations are block-level circuits which may consist of atomic gates to perform complex functions in order to ensure hazard freedom. First, we present Boolean covering conditions that guarantee that the standard C-implementations operate correctly. Then, we present two algorithms that produce optimal solutions to the covering problem. The first algorithm is always applicable, but does not complete on large circuits. The second algorithm, motivated by our observation that our covering problem can often be solved with a single cube, finds the optimal single-cube solution when such a solution exists. When applicable, the second algorithm is dramatically more efficient than the first, more general algorithm. We present results for benchmark specifications which indicate that our single-cube algorithm is applicable on most benchmark circuits and reduces run times by over an order of magnitude. The block-level circuits generated by our algorithms are a good starting point for tools that perform technology mapping to obtain gate-level speed-independent circuits

Published in:

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:17 ,  Issue: 3 )

Date of Publication:

Mar 1998

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