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A fast procedure placement algorithm for optimal cache use

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3 Author(s)
S. Lorenzini ; Dipt. di Ingegneria dell'Inf., Pisa Univ., Italy ; G. Luculli ; C. A. Prete

We present a procedure placement method for embedded applications. We use the trace-driven simulation to collect information on the use of the cache line and then a heuristic algorithm to perform the placement. The main features of our method are a short computation time and a strong reduction of miss ratio. Experimental results shows an average miss rate reduction of 32%, but better improvements are obtained depending on the specific application

Published in:

Electrotechnical Conference, 1998. MELECON 98., 9th Mediterranean  (Volume:2 )

Date of Conference:

18-20 May 1998