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Prioritized multiprocessor networks: design and performance

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2 Author(s)
Ravindran, G. ; Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada ; Stumm, M.

This paper proposes and evaluates prioritized direct shared-memory multiprocessor networks. We use three components to implement prioritized networks, namely, priority-based link arbitration, priority inheritance, and dynamic virtual channels. The two major results from our study are: (i) adding priorities to direct shared-memory multiprocessor networks can lead to reduced average transaction latencies and increased system throughput when running traditional parallel applications, and (ii) a prioritized multiprocessor network can be used to reduce the worst-case latencies of time-constrained traffic when it co-exists with best-effort traffic, without penalizing the average performance of best-effort traffic

Published in:

Modeling, Analysis and Simulation of Computer and Telecommunication Systems, 1998. Proceedings. Sixth International Symposium on

Date of Conference:

19-24 Jul 1998