Referenced Items are not available for this document.
An 8-b slice GaAs bus logic (BL) LSI for a high-speed parallel processing system has been designed with a standard-cell approach, fabricated by a 0.8- mu m WN/sub x/ gate LDD MESFET process, and confirmed to be fully functional. The BL consists of 3376 logic-gates and a 76-b dual-port register file (RF) in a 7-mm*7-mm chip. A 10-ns cycle time has been achieved with a power dissipation of 7 W. By constructing a data transfer network with 48 GaAs BLs, it is possible to realize a data transfer rate of 4 Gb/s (32 b*120 Mcycle/s).<
Published in:
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1989. Technical Digest 1989., 11th Annual
Date of Conference: 22-25 Oct. 1989
- Page(s):
- 105 - 108
- Meeting Date :
- 22 Oct 1989-25 Oct 1989
- INSPEC Accession Number:
- 3676453
- Conference Location :
- San Diego, CA, USA
- Digital Object Identifier :
- 10.1109/GAAS.1989.69304
- Product Type:
- Conference Publications
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