By Topic

High speed, smart focal plane processing using integrated photodetectors and Si CMOS VLSI sigma delta analog to digital converters

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

7 Author(s)
YoungJoong Joo ; Sch. of Electr. Eng., Georgia Inst. of Technol., Atlanta, GA, USA ; S. Fike ; M. Thomas ; Kee Shik Chung
more authors

We report on the first demonstration of a high frame rate smart pixel imaging system which uses an ADC for in each pixel in an 8x8 integrated detector array. The smart pixel architecture of this system enables frame rates up to 100 kfps operating in continuous imaging mode.

Published in:

Broadband Optical Networks and Technologies: An Emerging Reality/Optical MEMS/Smart Pixels/Organic Optics and Optoelectronics. 1998 IEEE/LEOS Summer Topical Meetings

Date of Conference:

20-24 July 1998