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High speed, smart focal plane processing using integrated photodetectors and Si CMOS VLSI sigma delta analog to digital converters

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7 Author(s)
YoungJoong Joo ; Sch. of Electr. Eng., Georgia Inst. of Technol., Atlanta, GA, USA ; Fike, S. ; Thomas, M. ; Kee Shik Chung
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We report on the first demonstration of a high frame rate smart pixel imaging system which uses an ADC for in each pixel in an 8x8 integrated detector array. The smart pixel architecture of this system enables frame rates up to 100 kfps operating in continuous imaging mode.

Published in:
Broadband Optical Networks and Technologies: An Emerging Reality/Optical MEMS/Smart Pixels/Organic Optics and Optoelectronics. 1998 IEEE/LEOS Summer Topical Meetings

Date of Conference: 20-24 July 1998

Page(s):
IV/55 - IV/56
Meeting Date :
20 Jul 1998-24 Jul 1998
Print ISBN:
0-7803-4953-9
INSPEC Accession Number:
6258702
Conference Location :
Monterey, CA, USA
Digital Object Identifier :
10.1109/LEOSST.1998.690447
Product Type:
Conference Publications

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