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A unique 6.4 μm/sup 2/ 6Tr. SRAM cell has been developed using an advanced CMOS technology implemented in 0.25 μm design rule for high density and high speed applications. Very small aspect ratio of 0.63 has been achieved for the cell design. Special features in the layout are parallel active regions and orthogonal gate electrodes, all bar shape. Stable cell operation has been obtained at 0.5 V.