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A non-complimentary rewriting scheme is proposed for open-bit-line DRAMs adopting shared-sub-sense amplifier. The scheme can theoretically cancel inter-bit-line coupling noise down to zero. In order to suppress the peak in word-line noise, a serial-data coding scheme was also developed. This scheme can reduce word-line noise to at least 50%. These two circuits were applied to an experimental 1 Gb DRAM using 0.22 /spl mu/m CMOS process technology for file applications.