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Timing Verification of Fault-Tolerant Chips for Safety-Critical Applications in Harsh Environments

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5 Author(s)
Slijepcevic, M. ; Univ. Politec. de Catalunya, Barcelona, Spain ; Kosmidis, L. ; Abella, J. ; Quinones, E.
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Critical real-time embedded systems (CRTES), which are deployed in cars, planes, and satellites, among other domains, feature increasingly complex safety-related, performance-demanding functionality. Realistically, such functionality can be provided by means of advanced (high-performance) hardware and software. This will inevitably shift CRTES from using simple control software running on in-order, single-core processors with no caches to complex multisensor and multiactuator software running on aggressive processors implemented in nanoscale technology deploying several computing cores and a cache hierarchy. However, the use of aggressive technologies and architectures challenges time predictability and reliability, which are mandatory features in CRTES. The authors present a processor design that reconciles all three goals--namely, predictability, reliability, and high performance. Their design obtains trustworthy and tight worst-case execution time (WCET) estimates for safety-critical applications running on high-performance hardware facing hard and soft errors by means of a smart use of timing-analysis techniques in combination with minor hardware modifications.

Published in:

Micro, IEEE  (Volume:34 ,  Issue: 6 )