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Accelerated Harmonic-Balance Analysis Using a Graphical Processing Unit Platform

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3 Author(s)
Bandali, B. ; Sch. of Electr. Eng. & Comput. Sci., Univ. of Ottawa, Ottawa, ON, Canada ; Gad, E. ; Bolic, M.

This paper describes a new approach to accelerate the simulation of the steady-state response of nonlinear circuits using the harmonic-balance (HB) technique. The approach presented in this paper focuses on the direct factorization of the Jacobian matrix, of the HB nonlinear equations, using a graphical processing unit (GPU) platform. The computational core of the proposed approach is based on developing a block-wise version of the KLU factorization algorithm, where scalar arithmetic operations are replaced by block-aware matrix operations. For a large number of harmonics, or excitation tones, or both, the Block-KLU (BKLU) approach effectively raises the ratio of floating-point operations to other operations and, therefore, becomes an ideal vehicle for implementation on a GPU-based platform. Motivated by this fact, we develop a GPU-based framework to implement the BKLU. The proposed approach yields speedup by up to 89 times over conventional direct factorization on CPU.

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:33 ,  Issue: 7 )