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Two high-resolution passive delay line phase shifters in silicon-on-sapphire are compared. Both make use of digitally tuned capacitor loaded π sections to obtain 360 ° phase control. The first has a nominal resolution of 9-bit and uses ten sections, yielding an insertion loss (IL) of 12.6 dB at 1.4 GHz. The second employs a center tapped auto-transformer to provide 180 ° of phase shift, reducing both size and the IL while enabling a further 1-bit improvement in resolution. The measured IL in the 1.8-2.4-GHz frequency range is less than 7.3 dB. Stacked field-effect transistors were employed as switches to increase the power-handling capability. An input referred third intercept point (IIP3) of +39 and +54 dBm were measured for the first and second circuits, respectively.