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A triple redundant controller which adopts the time-sharing fault recovery method and its application to a power converter controller

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11 Author(s)
Shimamura, K. ; Res. Lab., Hitachi Ltd., Ibaraki, Japan ; Morita, Y. ; Takahashi, Y. ; Hotta, T.
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A novel fault recovery method, in which memory copy from a normal system to a fault detected system is executed in time-sharing fashion, has been implemented in a triple redundant controller. This method reduces data copy bandwidth required for recovery of the fault detected system, and allows non-stop fault recovery with only a little hardware overhead, even when the controller contains multiple processors and operates at a very short operating period. The developed controller contains triplicated processing units, each of which consists of seven 60 MIPS processor boards connected by a 30 MHz 4 byte bus. One processor board contains a bus arbiter, and each of the remaining six processor boards contains three sets of 100 Mbps two-way optical links, which can be utilized for inter-system memory copy as well as for connecting to 10 units. This controller has been applied to a power converter controller, and a 104 microsecond operating period was achieved

Published in:

Real-Time Technology and Applications Symposium, 1998. Proceedings. Fourth IEEE

Date of Conference:

3-5 Jun 1998